The present invention is generally in the field of oscillators. More specifically, the invention is in the field of non-linear oscillators.
Virtually all modem electronic devices implement oscillators to provide various functions such as clock signals and frequency generation. Many oscillator designs are well known in the art such as Hartley, Colpitts and Wien bridge. Nonlinear oscillators provide sinusoidal (i.e., harmonic) behavior, which can be represented by a set of simple equations as a dynamic system.
A class of nonlinear oscillators known as xe2x80x9cvan der Pol oscillatorsxe2x80x9d can provide sinusoidal behavior when operated in a weak nonlinear mode. Regardless of design, van der Pol oscillators have two dynamical variables and comprise nonlinear response (NLR) devices and linear response (LR) devices. Typical van der Pol oscillators include weak NLR (WNLR) devices that produce weak nonlinear responses from xe2x80x9cOpAmpsxe2x80x9d (i.e., operational amplifiers) coupled with additional circuit elements such as resistors and diodes. In addition, typical van der Pol oscillators are designed without uniformity of amplifiers. For example, typical van der Pol WNLR devices include different amplifiers than typical van der Pol LR devices.
Disadvantageously, typical van der Pol oscillators comprise many different circuit elements such as amplifiers, resistors and diodes. Additionally, some circuit elements, such as amplifiers, are non-uniform. Thus, implementation in device processes (e.g., CMOS device processes) can be complex and costly. Moreover, typical van der Pol WNLR devices disadvantageously consume large chip areas when implemented in microchip devices (e.g., CMOS devices) because OpAmps are coupled with additional circuits to produce nonlinear responses.
Therefore, a need exists for an improved nonlinear amplifier having reduced complexity, which reduces fabrication cost. In addition, a need exists for a method and apparatus for a nonlinear amplifier that reduces consumption of chip area.
The present invention is directed to a method and apparatus for a nonlinear oscillator. The invention overcomes the need in the art for a nonlinear oscillator having reduced complexity and reduced consumption of chip area, which reduces fabrication cost. The present invention includes multiple amplifiers having a substantially similar design, which can produce weak nonlinear response functions and linear response functions. The present inventive nonlinear oscillator can use a single amplifier design to produce nonlinear responses.
According to one embodiment, the present invention is a nonlinear oscillator, where the system includes a first linear amplifier, a second linear amplifier and a nonlinear amplifier, which have a substantially similar design that includes an adjustable linear transconductance region width. The first linear amplifier receives an input voltage and outputs a first output current. The second linear amplifier is operatively coupled to the first linear amplifier. The second linear amplifier receives the first output current and outputs a second output current. The nonlinear amplifier is operatively coupled to the first and second linear amplifiers. The nonlinear amplifier receives the second output current and outputs a third output current. The input/output characteristics of the nonlinear oscillator can be represented by the van der Pol equations. In one embodiment, the nonlinear oscillator further comprises a first capacitor and a second capacitor. The first capacitor is operatively coupled to an output of the first linear amplifier, an input of the second linear amplifier, an input of the first linear amplifier and an output of the nonlinear amplifier. The second capacitor is operatively coupled to an output of the second linear amplifier, an input of the second linear amplifier and an input of the nonlinear amplifier.
According to another embodiment, the present invention is a method for providing nonlinear oscillations in a nonlinear oscillator. The method comprises a step of receiving an input voltage and a first oscillator voltage in a first linear amplifier. Next, a first difference voltage is converted to a first linearly proportional current via the first linear amplifier. Then, a first capacitor is charged via output currents from the first linear amplifier and a nonlinear amplifier. Thereafter, a second oscillator voltage and the first oscillator voltage are received in a second linear amplifier. Next, a second difference voltage is converted to a second linearly proportional current via the second linear amplifier. Then, a second capacitor is charged via the second linearly proportional current. Thereafter, the second oscillator voltage and the first oscillator voltage are received in the nonlinear amplifier. Next, a third difference voltage is converted to a nonlinearly proportional current via the nonlinear amplifier. The method then returns to the first step. The input/output characteristics of the nonlinear oscillator can be represented by the van der Pol equations. The first linear amplifier, second linear amplifier and nonlinear amplifier have a substantially similar design that includes an adjustable linear transconductance region width.
The previously summarized features and advantages along with other aspects of the present invention will become clearer upon review of the following specification taken together with the included drawings.